FULLY REMOTE- Design Verification Engineer-SystemVerilog UVM
Company: CyberCoders
Location: Atlanta
Posted on: June 25, 2022
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Job Description:
If you are a FULLY REMOTE- Design Verification
Engineer-SystemVerilog UVM with experience, please read on!What You
Will Be DoingTHESE POSITIONS ARE FOREVER FULLY REMOTE, I HAVE
POSITIONS FROM MID LEVEL TO PRINICPAL LEVEL FOR THIS ROLEJob Title:
Design Verification Engineer of SOCSkills in ASIC / FPGA
verification (directed test or SystemVerilog / UVM)Basic knowledge
in design techniques Verilog or VHDLGood knowledge of simulation
flowGood basis in scripting Python, Perl, Bash&A good level in
English, both writing and oral skillsHumanly, you have to be
rigorous and have a good analytical mind, you have to enjoy working
in a team and being diplomatic, in particular when you have to
point out the bugs discovered.What You Need for this Position
Keywords: CyberCoders, Atlanta , FULLY REMOTE- Design Verification Engineer-SystemVerilog UVM, Engineering , Atlanta, Georgia
Click
here to apply!
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